1. Field of the Invention
The invention relates generally to the semiconductor power devices. More particularly, this invention relates to configurations and methods to improve the termination regions of a semiconductor power device for reducing the areas occupied by the termination areas while maintaining high breakdown voltages for the high voltage power devices.
2. Description of the Prior Art
Conventional manufacturing technologies and device configuration to further increase the breakdown voltage of a semiconductor power device at the terminal areas are still confronted with difficulties that the termination areas occupy large areas. The difficulties are becoming more severe and limiting especially when the semiconductor power devices are now manufactured with ever reduced size. A general survey discovers that for smaller chips, the edge termination area takes up about 20% of the total area. However, as size of the chip becomes smaller and smaller, e.g., about 10 times smaller, the percentage of the edge termination area gradually increases and may take up to about 50% of the total area in order to maintain a high breakdown voltage, for example about 600V. The termination area is a “non-active” area of a transistor because the edge terminal is not useful for current conduction. Even though large areas taken up by the edge termination leads to wastes of valuable active cell areas there is still no viable solution to overcome this difficulty.
FIGS. 1A and 1B are cross sectional view of an ideal PN junction with parallel plane breakdown voltage, and an unterminated PN junction at the edge of a vertical power device to explain the need of improvements for edge termination. FIG. 1A shows an ideal PN junction with parallel plane avalanche breakdown. This is the theoretical limit of Breakdown voltage that can be reached for the given doping levels and thickness of the lightly doped N-type drift region. The parallel plane edge termination has P body region 103 and the lightly doped N drift region 107 formed as parallel plane to extend all the way to the edge of the heavily doped N-type substrate 105. The electrical potential lines in this ideal configuration would extend as parallel lines toward the edge and therefore no field crowding effect to adversely affect the breakdown voltage thus achieving a maximum breakdown voltage, e.g., approximately up to 700 volts.
However, the actual breakdown voltage of a reversed bias junction can be severely degraded at the edge, due to field crowding from the formation of a cylindrical junction, as shown in FIG. 1B. It can be observed that the shape of the depletion region is convex, and that leads to the electric field crowding near the junction. The cylindrical breakdown voltage of this edge termination, e.g., approximately 230 volts, is significantly lower than that required for a high voltage, e.g., 600 volts, due to the distribution of the electrical field that are crowded near the edge of the P body region 102.
In order to mitigate this problem, several edge terminations have been proposed, and are widely used in the industry. Some of these include the floating guard rings 90 of FIG. 1C and the Electric Field plate 92 of FIG. 1D. These techniques improve the Breakdown voltage by spreading the depletion region at the surface and thus lowering the electric field. However, these methods typically require large area for implementation, and cause an increase in the die size of the device. In addition, these techniques are prone to surface charges coming from the passivation films and/or the packaging mold compound.
Therefore, an urgent need still exists in the art of power semiconductor device design and manufacture to provide new device configurations and manufacturing method in forming the power devices to reduce the areas taken up by the edge termination while maintaining sufficiently high breakdown voltage such that the above discussed problems and limitations can be resolved.